Conventional microprocessors implement a well-documented, fixed set of instructions. Such microprocessors are realized in fixed logic, and in such a way that it is impossible to add new instructions once the chip has been fabricated. As a result, the instruction set that a given microprocessor can implement is chosen to capture the largest possible set of application requirements, in the most compact form possible.
However, it is presently not possible to create an “optimal” instruction set for a microprocessor that is used for general purpose applications, because the number and variety of available application programs are constantly growing and evolving, and even their main focus shifts as each customer's lifestyle changes. For example, the “x86” instruction set has been evolving regularly over the years; at different stages, new instructions have been added to better deal with scientific computations, to facilitate media and signal processing functionality, and to deal with larger memories and data sets.
At the same time, classical microprocessor architectures have reached their limits in terms of clock speeds. Thus, it is becoming apparent in the industry that a way to provide improvements in execution speed that are expected by application programmers and customers alike require a new way to structure the execution of programs.
In sum, conventional microprocessors and classical microprocessor architectures will no longer be adequate for upcoming computing and data processing requirements.